1. Field of the Invention
This invention relates to phase-lock loop systems and more particularly to phase-lock loop systems for frequency stabilizers.
2. Description of the Related Art
Phase-lock loops (PLLs) find applications in a wide variety of devices including wireless communication systems, disk drive electronics, high speed digital circuits and instrumentation. A PLL is simply a servo system that controls the phase of an output signal so that the phase error between the output signal and a reference input signal are reduced to a minimum. PLL circuits include at a minimum a phase/frequency detector (PFD) and a voltage control oscillator (VCO). It is also common for these circuits to contain a charge pump which is used to convert the logic states of the PFD into analog signals suitable for controlling the VCO. Such circuits are known as charge-pump phase-lock loops.
Charge-pump PPL's are commonly used to lock a local oscillating signal to a carrier frequency so that the carrier frequency can be removed, leaving an information signal of interest. Many of the devices which utilize charge-pump phase-lock loop systems operate in the microwave (900 MHZ-30 GHz) or millimeter wave (30-300 GHz) portion of the electromagnetic spectrum.
As shown in FIG. 1, a prior art charge-pump PPL circuit 20 includes a VCO 22, which may be implemented as an LC tank circuit and which develops a local oscillating signal that is locked to a remotely received carrier signal. Both the local signal (whose frequency may be divided by a factor N) and the remote signal are applied to a PFD 24 which compares their phases and frequencies. The phase/frequency difference between the two signals results in a voltage output which is received by a charge pump 26. The charge pump, otherwise known as a transresistance amplifier, converts the voltage signal into a current signal which is provided to a fixed capacitor 28. The capacitor integrates the current, producing an output voltage which is supplied to the VCO to adjust the local signal. A low pass filter 30 is often utilized to remove unwanted harmonics generated by charge pump 26. The filter is commonly placed in the circuit prior to the VCO. The circuit may additionally contain a divider 32 between the VCO and the PFD to reduce the frequency of the local signal generated by the VCO.
As the capacitance of capacitor 28 is fixed, the designer must make an initial decision as to its size. If a large capacitor is selected, integration is slow but the system finds the carrier signal much faster then it would with a small capacitor. This is primarily due to limited over- and under-shoot. However, the larger capacitor may lack sensitivity to accurately lock onto the carrier signal. A smaller capacitor, on the other hand, results in a more accurate lock onto the carrier signal but the process is much slower. This is primarily due to the large number of over- and under-shoots. However, a small capacitor permits a more accurate lock onto the carrier signal. Alternately, a conventional variable capacitor can be utilized. However, conventional variable capacitors only slightly improve the situation in that their tunability is only on the order of 2:1. These capacitors are also quite large in size and their tuning quite slow. Other smaller variable capacitors have been used, but they too had limited tunability range. See Darrin J. Young and Bernhard E. Boser, "A Micromachined Variable Capacitor for Monolithic Low-Noise VCOS," Technical Digest of the 1996 Solid-State Sensor and Actuator Workshop, Hilton Head, S.C., pp. 86-89.